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Please use this identifier to cite or link to this item: http://eprint.iitd.ac.in/handle/2074/1610

Title: On single row routing
Authors: Saxena, S
Prasad, V C
Keywords: single-row routing
concurrent-read-concurrent-
shared-memory model
concurrent-read-exclusive-
Issue Date: 1989
Citation: Circuits and Systems, IEEE Transactions on, 36(7), 1029 - 1032
Abstract: A parallel algorithm for the single-row routing problem without backward moves and interstreet crossings is presented. The algorithm requires O(log N log log N) time with N processors on a concurrent-read-concurrent-write shared-memory model or alternatively O(log2 N) time with N processors on a concurrent-read-exclusive-write shared-memory model. The algorithm is then modified to run sequentially in O(N) time
URI: http://eprint.iitd.ac.in/dspace/handle/2074/1610
Appears in Collections:Electrical Engineering

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