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Please use this identifier to cite or link to this item: http://eprint.iitd.ac.in/handle/2074/1688

Title: Fault-tolerant analysis and algorithms for a proposed augmented binary tree architecture
Authors: Jain, B N
Mittal, R
Patney, R K
Keywords: augmented binary (AB)
fault tolerance
n-level full binary tree
redundant nodes
fewer wire crossovers
diagnosis algorithm
Issue Date: 1989
Citation: Distributed Computing Systems, 524 - 531
Abstract: An augmented binary (AB) tree architecture is proposed with a view to providing fault tolerance. This architecture is an augmentation of an n-level full binary tree with n redundant nodes and 2 n+3n-6 redundant links. The AB tree can be configured into a full binary tree even when one node is faulty at each level. While functionally equivalent to the RAE-tree, the proposed AB tree has a regular topology, reduced number of maximum input-output channels per processor, and fewer wire crossovers when implemented using very large-scale integration layout. A reconfiguration algorithm, which constructs an n-level full binary tree from an n-level faulty AB tree, is given. A distributed fault diagnosis algorithm is given which runs concurrently on each nonfaulty processor, enabling each nonfaulty processor to identify all faulty processors
URI: http://eprint.iitd.ac.in/dspace/handle/2074/1688
Appears in Collections:Computer Science and Engineering

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