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Please use this identifier to cite or link to this item: http://eprint.iitd.ac.in/handle/2074/1692

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dc.contributor.authorJain, Navneet K-
dc.contributor.authorPrasad, V C-
dc.contributor.authorBhattacharyya, A B-
dc.date.accessioned2006-06-26T03:25:45Z-
dc.date.available2006-06-26T03:25:45Z-
dc.date.issued1990-
dc.identifier.citationComputer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, 9(5), 554 - 560p.en
dc.identifier.urihttp://eprint.iitd.ac.in/dspace/handle/2074/1692-
dc.description.abstractThe sensitivity of delay time (time required to achieve a given target voltage) at any node of a nonlinear monotone RC tree is studied using the adjoint-network approach. It is shown that the sensitivity of τ with respect to changes in a parameter of the resistors or the capacitors of the tree can be expressed as an integral of the solutions of the network and its adjoint network. Using this integral it is then established that τ increases for some nodes (depending upon location of a node) due to the decrease in a given resistor value, when τ is small. For other nodes τ would decrease. However, if the target voltage is close to the steady-state value then τ decreases for all the nodesen
dc.format.extent86023 bytes-
dc.format.mimetypeapplication/pdf-
dc.language.isoenen
dc.subjectmonotone RC treeen
dc.subjectadjoint networken
dc.subjectsteady-state valueen
dc.titleDelay time sensitivity in nonlinear monotone RC treesen
dc.typeArticleen
Appears in Collections:Electrical Engineering

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