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Please use this identifier to cite or link to this item: http://eprint.iitd.ac.in/handle/2074/1878

Title: Estimation of power from module-level netlists
Authors: Ravikumar, C P
Prasad, M R
Hora, L S
Keywords: gate-level netlists
module-level circuits
power expression generator
Issue Date: 1996
Citation: VLSI Design, Proceedings, Ninth International Conference on, 324 - 325p.
Abstract: Existing power estimation tools work on gate-level netlists and cannot be readily adapted for module-level circuits. Flattening the module-level netlist to gate level for purposes of power estimation and subsequent application of a gate-level estimation algorithm are both cumbersome tasks, demanding excessive amounts of CPU time and memory. We present a Module-level Power Estimation tool called MOPE. A preprocessor called PEG (Power Expression Generator) is first used on each module type used in the circuit; PEG compiles signal probability expressions for each output node in the module, as well as an expression for the total power dissipation in the module. These expressions are terms of input signal probabilities, and are stored as part of a module library. MOPE makes use of the signal probabilities of the data inputs and the operational frequencies of modules in conjunction with the power expressions generated by PEG to provide an estimate of the total power dissipation. MOPE can handle both sequential and combinational circuits. We have implemented PEG and MOPE on a Sun SPARC workstation and describe several experimental results which bring out the effectiveness of MOPE as a power estimator
URI: http://eprint.iitd.ac.in/dspace/handle/2074/1878
Appears in Collections:Electrical Engineering

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