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Please use this identifier to cite or link to this item:
http://hdl.handle.net/2074/1970
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Full metadata record
| DC Field | Value | Language |
|---|
| contributor.author | Bhaumik, B | - |
| contributor.author | Visweswaran, G S | - |
| contributor.author | Lakshminarasimhan, R | - |
| date.accessioned | 2006-07-03T09:25:19Z | - |
| date.available | 2006-07-03T09:25:19Z | - |
| date.issued | 1999 | - |
| identifier.citation | VLSI Design, Proceedings Twelfth International Conference On, 95 - 98p. | en |
| identifier.uri | http://eprint.iitd.ac.in/dspace/handle/2074/1970 | - |
| description.abstract | Generalized Modified Positional Syndrome (GMPS), of order p, a new compaction scheme for test output data is presented. The order p determines the aliasing probability and the amount of hardware overhead required to implement the scheme. GMPS of order two gives an aliasing probability about an order of magnitude lower than the best scheme reported in literature with minimal extra hardware. A hardware realization scheme for GMPS has been presented. The scheme uses adders with feedback | en |
| format.extent | 42309 bytes | - |
| format.mimetype | application/pdf | - |
| language.iso | en | en |
| subject | generalized modified positional syndrome | en |
| title | A new test compression scheme | en |
| type | Article | en |
| Appears in Collections: | Electrical Engineering
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Files in This Item:
| File |
Description |
Size | Format |
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| bhaumiknew1999.pdf | | 41Kb | Adobe PDF | View/Open |
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