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Please use this identifier to cite or link to this item: http://eprint.iitd.ac.in/handle/2074/1971

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dc.contributor.authorRavikumar, C P-
dc.contributor.authorSharma, M-
dc.contributor.authorPatney, R K-
dc.date.accessioned2006-07-03T09:26:55Z-
dc.date.available2006-07-03T09:26:55Z-
dc.date.issued1999-
dc.identifier.citationVLSI Design, Proceedings Twelfth International Conference On, 629 - 634p.en
dc.identifier.urihttp://eprint.iitd.ac.in/dspace/handle/2074/1971-
dc.description.abstractTesting and fault diagnosis of core-based systems are both difficult problems. Being able to identify which module in the core-based system is faulty has become very important. In this paper, we present algorithms to introduce test points for improving the diagnosability of a digital system. We define a measure of diagnosability known as module resolution which relates to the number of circuit modules that are suspected to be faulty after the diagnostic test procedure has been completed. We present a technique to partition the system into subsystems such that they can be tested in isolation. We also concurrently arrive at a test schedule which minimizes the overall effort in diagnostic testing. We have developed a tool called DEBIT for identifying the number, type, and location of test points in the circuit. We report the results of applying the tool on several benchmark circuitsen
dc.format.extent66601 bytes-
dc.format.mimetypeapplication/pdf-
dc.language.isoenen
dc.subjectcircuit modulesen
dc.subjectDEBITen
dc.titleImproving the diagnosability of digital circuitsen
dc.typeArticleen
Appears in Collections:Electrical Engineering

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