EPrints@IIT Delhi >
Faculty Research Publicatons  >
Computer Science and Engineering >

Please use this identifier to cite or link to this item: http://eprint.iitd.ac.in/handle/2074/1985

Title: Optimal hardware/software partitioning for concurrent specification using dynamic programming
Authors: Shrivastava, A
H Kumar
Kapoor, S
S Kumar
Balakrishnan, M
Keywords: vice versa
concurrent task graph
Issue Date: 2000
Citation: VLSI Design, Thirteenth International Conference on, 110 - 113p.
Abstract: An important aspect of hardware-software co-design is partitioning of tasks to be scheduled on the hardware and software resources. Existing approaches separate partitioning and scheduling in two steps. Since partitioning solutions affect scheduling results and vice versa, the existing sequential approaches may lead to sub-optimal results. In this paper, we present an integrated hardware/software scheduling, partitioning and binding strategy. We use dynamic programming techiques to devise an optimal solution for partitioning of a given concurrent task graph which models the co-design problem, for execution on one software (single CPU) and several hardware resources (multiple FPGAs), with the objective of minimizing the total execution time. Our implementation shows that we can solve problem instances where the task graph has 40 nodes and 600 edges in less than a second
URI: http://eprint.iitd.ac.in/dspace/handle/2074/1985
Appears in Collections:Computer Science and Engineering

Files in This Item:

File Description SizeFormat
shrivastavaopt2000.pdf41.84 kBAdobe PDFView/Open
View Statistics

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.


Valid XHTML 1.0! DSpace Software Copyright © 2002-2010  Duraspace - Feedback