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Please use this identifier to cite or link to this item: http://eprint.iitd.ac.in/handle/2074/2002

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dc.contributor.authorMaheshwari, S K-
dc.contributor.authorVisweswaran, G S-
dc.identifier.citationVLSI Design, Thirteenth International Conference on, 484 - 487p.en
dc.description.abstractDesign of a 3.3 V compatible 2.5 V TTL-to-CMOS bidirectional I/O buffer is proposed. Gate oxide protection was implemented without active voltage degradation, which reduces static and dynamic current levels and improves noise immunity for the low voltage circuit of this kind. Fast removal of stored charge further improves gate oxide protection and circuit recovery from overvoltage condition. A circuit was designed and simulated in 0.25 μm technologyen
dc.format.extent293802 bytes-
dc.subjecta 3.3 V compatible 2.5 V TTL-to-CMOS bidirectional I/O bufferen
dc.subjectactive voltage degradationen
dc.subjectlow voltage circuiten
dc.subjectgate oxide protectionen
dc.titleA 3.3 V compatible 2.5 V TTL-to-CMOS bidirectional I/O bufferen
Appears in Collections:Electrical Engineering

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