DSpace
 

EPrints@IIT Delhi >
Faculty Research Publicatons  >
Computer Science and Engineering >

Please use this identifier to cite or link to this item: http://eprint.iitd.ac.in/handle/2074/2043

Full metadata record

DC FieldValueLanguage
dc.contributor.authorMohan, M-
dc.contributor.authorRohini, K-
dc.contributor.authorA Kumar-
dc.contributor.authorBalakrishnan, M-
dc.date.accessioned2006-08-07T03:24:31Z-
dc.date.available2006-08-07T03:24:31Z-
dc.date.issued2002-
dc.identifier.citationDesign Automation Conference, Proceedings of ASP-DAC 7th Asia and South Pacific and the 15th International Conference on VLSI Design. Proceedings, 535 - 540p.en
dc.identifier.urihttp://eprint.iitd.ac.in/dspace/handle/2074/2043-
dc.description.abstractPresents a new method of performing division in hardware and explores different ways of implementing it. This method involves computing a preliminary estimate of the quotient by splitting the dividend, performing division of each of the parts in parallel and merging them. The estimate is refined iteratively to get the final quotient. This method is significantly fast since it carries out parallel operations to compute the preliminary quotient and makes use of a fast multiplier to refine the result. It is possible to pipeline the execution of the unit yielding further increase in throughput. Speed estimates show that this method yields a much higher throughput than other fast methods, while area and latency are comparable.en
dc.format.extent351170 bytes-
dc.format.mimetypeapplication/pdf-
dc.language.isoenen
dc.subjectfinal quotienten
dc.titleA new divide and conquer method for achieving high speed division in hardwareen
dc.typeArticleen
Appears in Collections:Computer Science and Engineering

Files in This Item:

File Description SizeFormat
muralinew2002.pdf342.94 kBAdobe PDFView/Open
View Statistics

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

 

Valid XHTML 1.0! DSpace Software Copyright © 2002-2010  Duraspace - Feedback