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Please use this identifier to cite or link to this item: http://eprint.iitd.ac.in/handle/2074/2051

Title: ASIP design methodologies: survey and issues
Authors: Jain, M K
Balakrishnan, M
A Kumar
Keywords: application specific instruction processors
ASIP design
code synthesis
hardware synthesis
ASIP synthesis
Issue Date: 2001
Citation: VLSI Design, Fourteenth International Conference on, 76 - 81p.
Abstract: Interest in synthesis of Application Specific Instruction Processors or ASIPs has increased considerably and a number of methodologies have been proposed in the last decade. This paper attempts to survey the state of the art in this area and identifies some issues which need to be addressed. We have identified the five key steps in ASIP design as application analysis, architectural design space exploration, instruction set generation, code synthesis and hardware synthesis. A broad classification of the approaches reported in the literature is done. The paper notes the need to broaden the architectural space being explored and to tightly couple the various subtasks in ASIP synthesis
URI: http://eprint.iitd.ac.in/dspace/handle/2074/2051
Appears in Collections:Computer Science and Engineering

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