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Please use this identifier to cite or link to this item:
http://hdl.handle.net/2074/2105
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| Title: | SoC synthesis with automatic hardware-software interface generation |
| Authors: | Singh, A
Chhabra, A
Gangwar, A
Dwivedi, B K
Balakrishnan, M
A Kumar |
| Keywords: | system-on-chips
hardware component
generic hardware
spatial filter applications |
| Issue Date: | 2003 |
| Citation: | VLSI Design, Proceedings 16th International Conference on, 585 - 590p. |
| Abstract: | Design of efficient system-on-chips (SoCs) requires thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardware in order to meet the cost as well as the performance constraints. However, faster time to market requires automation of synthesis of these code segments of the application from high level specification such as C along with its interfaces. Such a synthesis system should be able to generate hardware which is easily pluggable in various types of architectures, as well as augment the application code to automatically take advantage of this new hardware component. In this paper, we address this problem and present an approach for complete SoC synthesis. We automatically generate synthesizable VHDL for the compute intensive part of the application along with necessary interfaces. Our approach is generic in the sense that it supports various processors and buses by keeping a generic hardware interface on one end ... |
| URI: | http://eprint.iitd.ac.in/dspace/handle/2074/2105 |
| Appears in Collections: | Computer Science and Engineering
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| singhsoc2003.pdf | | 314Kb | Adobe PDF | View/Open |
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