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Please use this identifier to cite or link to this item:
http://hdl.handle.net/2074/2240
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| Title: | A Trimaran based framework for exploring the design space of VLIW ASIPs with coarse grain functional units |
| Authors: | Middha, Bhuvan
Raj, Varun
Gangwar, Anup
Kumar, Anshul
Balakrishnan, M
Ienne, Paolo |
| Keywords: | Trimaran
VLIW
Performance
ASIP
Design space exploration |
| Issue Date: | 2002 |
| Citation: | System Synthesis, 15th International Symposium on, 2 - 7p. |
| Abstract: | It is widely accepted that use of an Application Specific Instruction Set Processor (ASIP) in an embedded system can provide a solution which is much more flexible than ASICs and much more efficient than standard processors in terms of performance and power consumption. However a lack of an acceptable design methodology and supporting tools for ASIPs limits their use even today. We present in this paper a methodology for design space exploration of high performance VLIW ASIPs by modeling Application Specific Functional Units in Trimaran Compiler Infrastructure. To demonstrate the effectiveness of our strategy we consider two important applications FFT and Kalman Filter and perform compute intensive operations in these applications via special Functional Units. The results we obtain are very promising with up to 2/spl times/ speed improvement. |
| URI: | http://eprint.iitd.ac.in/dspace/handle/2074/2240 |
| Appears in Collections: | Computer Science and Engineering
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| middhatri2002.pdf | | 231Kb | Adobe PDF | View/Open |
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