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Please use this identifier to cite or link to this item: http://eprint.iitd.ac.in/handle/2074/2270

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dc.contributor.authorRao, Venkat-
dc.contributor.authorSinghal, G-
dc.contributor.authorAnshul Kumar-
dc.date.accessioned2006-11-20T06:28:50Z-
dc.date.available2006-11-20T06:28:50Z-
dc.date.issued2004-
dc.identifier.citationVLSI Design, Proceedings 17th International Conference on, 650 - 653p.en
dc.identifier.urihttp://eprint.iitd.ac.in/dspace/handle/2074/2270-
dc.description.abstractThis paper presents a very efficient and versatile method to handle Dynamic Voltage Scaling for minimizing energy consumption in an embedded system processor while maintaining real time deadlines. It achieves this by creating pseudo operating frequency levels between the discrete frequency levels supported by the system, thereby addressing the root cause of inefficiency i.e. inability to vary frequency continuously. Simulation suggests that this method, in conjunction with DVS algorithms, achieves up to 70% energy savings which is an improvement of up to 25% over the best existing algorithms.en
dc.format.extent991158 bytes-
dc.format.mimetypeapplication/pdf-
dc.language.isoenen
dc.subjectdynamic voltage scalingen
dc.titleReal time Dynamic Voltage Scaling for embedded systemsen
dc.typeArticleen
Appears in Collections:Electrical Engineering

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