| Author: | Jain, M K; Balakrishnan, M; A Kumar |
| Advisor: | Advisor |
| Date: | 2001
|
| Publisher: | |
| Citation: | VLSI Desig
|
| Series/Report no.: |
|
| Item Type: | Article
|
| Keywords: | application specific instruction processors; ASIP design; code synthesis; hardware synthesis; ASIP synthesis |
| Abstract: | Interest in synthesis of Application Specific Instruction Processors or ASIPs has increased considerably and a number of methodologies have been proposed in the last decade. This paper attempts to survey the state of the art in this area and identifies some issues which need to be addressed. We have identified the five key steps in ASIP design as application analysis, architectural design space exploration, instruction set generation, code synthesis and hardware synthesis. A broad classification of the approaches reported in the literature is done. The paper notes the need to broaden the architectural space being explored and to tightly couple the various subtasks in ASIP synthesis |
